1. Field of the Invention
The invention relates in general to a voltage selective circuit of a power source having a first voltage and a second voltage, and more particularly to a power source for operating power of an integrated circuit, wherein a power selective circuit of the power supply can prevent junction leakage and also avoid generating a body effect, so as to ensure a drive capability of a transistor in a circuit.
2. Description of the Related Art
Some specific integrated circuits such as a flash memory require power supplies with different voltage levels to enable different operation modes such as to write/erase. Because these actions are achieved based on different supply voltages, a power supply must be able to selectively output different voltages. In order to achieve the aforesaid requirement, the power supply of the integrated circuits is configured with a power selective circuit. Referring to FIG. 4, a detailed circuit diagram of a conventional power selective circuit is shown. The power selective circuit includes a selective switch module 70, which is made up of two P-type MOS transistors 71 and 72. Two sources of the two P-type MOS transistors 71 and 72 are respectively connected to a first voltage VDD and a second voltage VPP. Two drains of the two P-type MOS transistors 71 and 72 are connected to each other to make up a power output terminal VPPIN.
A level shift module 80 is made up by two level shifters 81 and 82. The level shift module 80 is used for a group of lower level control signals ENVDD and ENVPP to be transformed to the control signals ENVDDHV and ENVPPHV with higher level values. Two control signal output terminals ENVDDHV and ENVPPHV of the two level shifters 81 and 82 are connected to the gate of the two P-type MOS transistors 71 and 72.
Generally speaking, the second voltage VPP of the power selective circuit is stepped up by a charge pump, so as to have a higher voltage. The first voltage VDD has a lower level voltage than the second voltage VPP. The selective switch module 70 selects to output the first voltage VDD or the second voltage VPP to the integrated circuit according to conducting conditions of the P-type MOS transistors 71 and 72. Thereby the demand for different operation modes can be provided. Therefore the voltage VDD of the power output terminal VPPIN is supplied to the integrated circuit when the P-type MOS transistor 71 is conductive. On the contrary, the voltage VPP of the power output terminal VPPIN is supplied to the integrated circuit when the P-type MOS transistor 72 is conductive.
However, the aforesaid power selective circuit generates a body effect when in an actual operation and results in an impaired drive capability problem. As described above, the selective switch module 70 is made up of two P-type MOS transistors 71 and 72. In order to avoid PN junction leakage when the two P-type MOS transistors 71 and 72 switch to output the voltage VDD or VPP, an N-well for the two P-type MOS transistors 71 and 72 should be biased up to a ceiling voltage. A conventional layout for the power selective circuit is to provide a floating N-well by making the junctions of the N-well, the source and the drain conductive to bias the N-well up to the ceiling voltage, and then the N-well is isolated to prevent the PN junction leakage. In such a condition, when the selective switch module 70 switches to the P-type MOS transistor 72 to be conductive to output the voltage VPP of the output terminal VPPIN and supply to the integrated circuit, the PN junction is thus conductive, so that the N-well gets charged. When the N-well is charged to an electric potential smaller than the VPP for a threshold voltage, the N-well is isolated. When the selective switch module 70 switches back to the P-type MOS transistor 71 to be conductive to output the voltage VDD of the output terminal VPPIN, because the N-well is isolated with the high electric potential, the P-type MOS transistor 71 thus generates the body effect and further impairs the drive capability of the P-type MOS transistor 71.